000			01447nac a22003371u 4500
010			_a 2005052924
020			_a0849379237
020			_a9780849379239
020			_a0849330963 (set)
020			_a9780849330964 (set)
035			_a(OCoLC)ocm61748498
035			_a(OCoLC)61748498
082	0	0	_a621.3815 _bSCH
090			_c8235 _d8235
100			_a20080729
245	0	0	_aEDA for IC system design, verification, and testing / _cedited by Louis Scheffer, Luciano Lavagno, Grant Martin.
246	3		_aElectronic design automation for integrated circuit system design, verification, and testing
260			_aBoca Raton, FL : _bCRC Taylor & Francis,2006 _c2006.
300			_a1 v. (various pagings) : _bill. ; _c27 cm.
440		0	_aElectronic design automation for integrated circuits handbook
500			_aCompanion volume of: EDA for IC implementation, circuit design, and process technology.
504			_aIncludes bibliographical references and index.
511			_acatalogued by: wessam
650		0	_aIntegrated circuits _xComputer-aided design.
650		0	_aIntegrated circuits _xVerification _xData processing.
700	1		_aScheffer, Louis Kossuth.
700	1		_aLavagno, Luciano, _d1959-
700	1		_aMartin, Grant _q(Grant Edmund)
856	4	2	_3Publisher description _uhttp://www.loc.gov/catdir/enhancements/fy0654/2005052924-d.html
942			_cBB _k621.3815SCH
952			_p000009892 _u10182 _dMAIN _v2028-02-08 _y0 _bMAIN
999			_c8235 _d8235