000 01229cam a2200301 a 4500
001 15981192
005 20101005161913.0
008 091112s2011 maua b 001 0 eng
020 _a0136019285 (alk. paper)
020 _a9780136019282 (alk. paper)
020 _a0130891614 (alk. paper)
020 _a9780130891617 (alk. paper)
040 _aDLC
_cDLC
_dYDX
_dBTCTA
_dBAKER
_dYDXCP
_dBWX
_dCDX
_dUV0
_dDLC
082 0 0 _a621.395
_222
_bCIL
100 1 _aCiletti, Michael D.
_928994
245 1 0 _aAdvanced Digital Design with the Verilog HDL /
_cMichael D. Ciletti.
250 _a2nd ed.
260 _aBoston :
_bPrentice Hall,
_cc2011.
300 _axviii, 965 p. :
_bill. ;
_c24 cm.
490 0 _aPrentice Hall Xilinx design series
_928995
504 _aIncludes bibliographical references and indexes.
650 0 _aLogic design
_xData processing.
_928996
650 0 _aVerilog (Computer hardware description language)
_928997
653 _bEle
_cFebruary2012
942 _2ddc
_cBB
999 _c16487
_d16487
952 _p000026145
_40
_epurchase
_00
_u27513
_bMAIN
_10
_o621.395 CIL
_d2012-02-19
_8Alahram
_h681
_70
_cLIB1
_2ddc
_g210
_yBB
_aMAIN