TY  - BOOK
AU  - Ciletti,Michael D.
TI  - Advanced Digital Design with the Verilog HDL
T2  - Prentice Hall Xilinx design series
SN  - 0136019285 (alk. paper)
U1  - 621.395 22
PY  - 2011///
CY  - Boston
PB  - Prentice Hall
KW  - Logic design
KW  - Data processing
KW  - Verilog (Computer hardware description language)
KW  - Ele
KW  - February2012
N1  - Includes bibliographical references and indexes
ER  -